Introduction
Tapered profile etch, often referred to as slope etch or tapered etch, is a specialized dry etching technique designed to fabricate features with controlled, non-vertical sidewall angles. While vertical, highly anisotropic profiles are typically essential for maintaining tight pitch density in integrated circuits, certain structures require a positive slope to facilitate downstream film deposition and gap-fill operations. In semiconductor manufacturing, creating a sloped profile is critical for ensuring reliable conformal or continuous film deposition over three-dimensional features.
Without a sloped profile, downstream metallization and dielectric deposition steps—such as physical vapor deposition (PVD), which is predominantly line-of-sight—cannot adequately coat deep or narrow trenches, resulting in void formation, keyholes, or localized thinning. Although highly conformal techniques like atomic layer deposition (ALD) can handle steeper aspect ratios, many thicker metallization layers still rely on sloped profiles for reliable step coverage. Consequently, tapered etching plays a vital role across multiple process modules, including through-silicon via (TSV) patterning, contact hole engineering, and shallow trench isolation (STI) gap-filling. To produce a controlled taper angle, engineers employ tailored dry etching chemistries and parameter balances that harmonize isotropic chemical reactions with directional physical sputtering.
Process map
This step lives inside the 14nm FinFET course
Compare mask selectivity, sidewall passivation, and profile-control goals at this STI trench etch. Its current text focuses on nearly vertical sidewalls; it does not demonstrate a taper angle or a tapered-etch recipe.
Real step names, layer-by-layer cross-sections, and rationale live inside the 14nm FinFET course, unlocked by account access.
Physics & Mechanism
Achieving a controlled sloped profile during plasma etching involves a dynamic balance between isotropic chemical reactions, anisotropic physical sputtering, and protective polymer passivation. The core physical mechanism relies on manipulating the ratio of sidewall passivation deposition relative to bottom material removal rate as a function of depth. During dry plasma etching, reactive ions are accelerated vertically toward the substrate by an electric field, whereas neutral radicals diffuse isotropically to react with unpassivated surfaces.
The Passivation-Inhibitor Model
The passivation-inhibitor model is the most widely deployed approach for generating a tapered profile. In this mechanism, the etchant gas mixture contains polymerizing precursors that continuously deposit a protective inhibitor film over all exposed surfaces of the feature. Directional, energetic ions strike the trench floor vertically, sputtering away the inhibitor layer and allowing chemical etchants to react with the underlying substrate. Ion-enhanced etching occurs as ions clear these inhibitor layers or accelerate surface reactions .
Because the feature sidewalls are parallel to the directional trajectory of incoming ions, they receive minimal direct ion bombardment, allowing the protective polymer layer to remain intact. As etching proceeds deeper into the substrate, this passivation film continuously accumulates on the upper sidewalls, progressively narrowing the effective mask opening and causing the trench width to taper inward as depth increases. For example, in silicon etching, incorporating fluorocarbon or hydrocarbon species into halogen-based plasmas enhances sidewall polymer accumulation, producing a more pronounced slope. Similarly, during hard mask etching with chlorine chemistries, adding additives like BCl3 forms passivating byproducts that deposit on sidewalls to adjust the taper angle.
Time-Multiplexed Alternating Etch Mechanisms
An alternative approach for generating sloped profiles, particularly in deep reactive ion etching (DRIE), is the time-multiplexed alternating process. Rather than relying on simultaneous deposition and etching, this technique alternates between anisotropic etch phases and isotropic chemical undercut phases within the same reaction chamber.
During the isotropic phase, an unbiased plasma generates neutral radicals (such as fluorine radicals from SF6) that chemically etch the sidewalls. By adjusting the duration ratio between the vertical anisotropic step and the lateral isotropic step within each cycle, the overall taper angle can be tailored. Shortening the individual cycle times breaks the lateral undercut into microscopic increments, smoothing out sidewall steps and forming a continuous sloped profile.
Mask Erosion Method
Tapered profiles can also be formed through controlled mask erosion. In this approach, the initial photoresist or hard mask is patterned with a pre-existing sloped profile. The plasma chemistry is tuned to yield a moderate etch selectivity between the mask material and the underlying substrate. As the etch progresses vertically, the thin peripheral edges of the sloped mask erode laterally, exposing fresh substrate material at outer margins. This lateral mask pullback transfers the sloped geometry of the mask into the underlying layer.
Process Principles & Parameter Interactions
Controlling the sidewall slope angle requires precise adjustment of plasma processing parameters to govern the balance between physical sputtering and chemical etching.
- Gas Chemistry Ratio: The primary leverage for adjusting taper angle is the passivant-to-etchant gas flow ratio. Increasing the proportion of polymerizing fluorocarbons or hydrocarbons relative to reactive halogens enhances sidewall passivation, yielding a shallower, more sloped profile. Conversely, increasing the chemical etchant concentration promotes lateral etching or bottom clearing, driving the profile closer to vertical.
- Radio Frequency (RF) Bias Power: RF bias power dictates the platen potential, which controls the kinetic energy of ions accelerating toward the substrate. Reducing bias power decreases ion kinetic energy, slowing the physical clearing of the passivation layer at the bottom corners of the feature. This permits passivating polymer to encroach inward along the trench bottom, resulting in a more sloped taper.
- Substrate Temperature: Temperature governs the adsorption and desorption kinetics of reactive radicals and passivation polymers. Lower substrate temperatures stabilize polymer passivation on sidewalls by retarding volatile desorption, maintaining a steady taper. Higher temperatures increase the volatility of passivating byproducts, promoting chemical lateral etching and thinning the protective sidewall film.
- Chamber Pressure: Adjusting chamber operating pressure alters the mean free path of plasma ions. Higher pressures increase gas-phase collision frequencies, scattering ion trajectories and diminishing vertical directionality. Scattered ion bombardment erodes passivation layers near the feature top, expanding the upper opening and modifying the profile taper.
Challenges & Failure Modes
Executing a tapered profile etch introduces several physical challenges that can impair structural integrity and device yield if unmitigated.
Taper Scalloping
In time-multiplexed alternating etch processes, switching between anisotropic physical etching and isotropic chemical etching can leave periodic ripples, known as scallops, on the sloped sidewall. Excessive scallop depth creates localized topography that disrupts the continuity of subsequent barrier or seed films, leading to step-coverage defects and voiding.
Profile Pinch-Off and Etch Stop
If the passivation-to-etching ratio becomes excessively high, polymer accumulation can become self-reinforcing. Sidewall polymer deposition can impact profile control and cause depth non-uniformity. Passivating material accumulates heavily near the top neck of the feature, restricting the flux of incoming ions and etchant radicals. This causes the trench to narrow rapidly with depth, culminating in premature etch stop or "pinch-off" before reaching the target depth.
Re-Entrant Profiles
Conversely, if sidewall passivation is inadequate or ion bombardment is excessively aggressive, the profile can transition from a positive taper into a re-entrant (negative) profile, where the feature is wider at the bottom than at the top. Re-entrant profiles prevent conformal gap-fill, trapping voids during dielectric isolation or metallization steps.
Critical Dimension (CD) Loss and Mask Erosion
Utilizing mask erosion to define sloped sidewalls inherently expands the lateral footprint of the etched feature. If mask erosion occurs too rapidly, the top critical dimension (CD) expands beyond design tolerances, risking electrical shorting with adjacent features or unintended erosion of adjacent protective structures.
Technology Node Evolution
The application and structural targets of tapered profile etching have evolved significantly across technology generations to meet scaling demands and new device geometries.
In planar process technologies such as the 28nm node, increasing aspect ratios in shallow trench isolation (STI) made gap-filling with dielectrics challenging. To address this, process modules integrated a Liner-Etch-Gap-fill sequence. After depositing a conformal oxide liner (distinguished from thermal oxide growth), a downstream chemical dry etch using NF3 and NH3 gases selectively reshaped the top region of the deposited liner, creating a sloped entry profile that enabled void-free dielectric deposition.
With the adoption of 14nm FinFET and 7nm FinFET architectures, managing fin field effect transistor source/drain contact resistance became critical. Sloped, tapered sidewalls were engineered in contact holes primarily to ensure void-free gap-fill of barrier and contact metals (such as tungsten or cobalt) within tight lateral footprints. To maximize physical contact area without widening the top footprint, etching was directed into the epitaxial source/drain material to carve three-dimensional (U-shaped or V-shaped) recessed bottom cavities, distinguishing sidewall tapering for metal fill from bottom epitaxial recessing for interface expansion. The process required selective reactive ion etching to sculpt the cavity without damaging neighboring gate spacer caps, often utilizing ultra-thin hard masks like HfO2 as etch stops.
Furthermore, during high-k metal gate (HKMG) stack patterning, controlling the slope of TiN hard masks was necessary to prevent shadowing during subsequent ion implantations. In advanced 3D integration, isolation trenches with sloped sidewalls are implemented at boundary regions between dense array structures and peripheral circuitry to smooth geometric transitions, mitigating film stress and preventing structural delamination.
Related Processes
Tapered profile etching is closely integrated with preceding patterning steps and subsequent film deposition modules.
- Photolithography and Hard Masking: The slope, edge roughness, and thickness of the photoresist or hard mask directly affect the transferred etch profile. Line-edge roughness or profile asymmetry in the mask can be transferred into the substrate during tapered etching.
- Physical Vapor Deposition (PVD): A primary integration incentive for tapered profile etching is enabling PVD metallization. In TSV fabrication, a positive sidewall taper ensures that sputtered barrier layers (such as Ti, Ta, or TiN) and seed layers maintain continuous coverage along deep sidewalls prior to electroplating.
- Chemical Mechanical Planarization (CMP): Following tapered feature etching and subsequent gap-fill with dielectric or conductor layers, chemical mechanical planarization (CMP) is employed to polish away overfill material and achieve global planarization across the wafer .
Future Outlook
As semiconductor fabrication advances into advanced technology scaling regimes, tapered profile etching adapts to novel device topologies and advanced packaging integration.
One major focus is the creation of interconnect vias with asymmetric sloped profiles. In advanced back-end-of-line (BEOL) routing, generating a via with a tapered flare along a single horizontal axis permits a larger top surface area—reducing via resistance—while maintaining a narrow, symmetric bottom footprint to prevent electrical shorting against tightly spaced adjacent interconnect lines.
Additionally, atomic layer etching (ALE) is increasingly combined with conventional reactive ion etching to achieve atomic-scale control over sloped sidewalls. The self-limiting reaction mechanisms of ALE allow fine control of taper angles while suppressing sidewall scalloping and surface roughness. In high-aspect-ratio 3D architectures, precise profile tuning remains indispensable for maintaining open vertical channels while managing physical stress and contact resistance limits.
References
Scratch formation and its mechanism in chemical mechanical planarization (CMP)
T. Kwon, M. Ramachandran, Jin-Goo Park
Silicon VLSI Technology - Full
James D. Plummer, Michael D. Deal, Peter B. Griffin
Silicon VLSI Technology · ISBN 978-0130850379