Forming Gas Anneal: Principles, Interface Physics, and Advanced Node Process Integration

Introduction

In modern semiconductor manufacturing, device reliability, performance, and yield are highly sensitive to microscopic defect states at material interfaces [P1]. Among the thermal processes employed to address these challenges, the forming gas anneal (FGA) is one of the most critical back-end and front-end interface passivation techniques (Engineering Practice). A forming gas is a non-flammable mixture of nitrogen and hydrogen (nitrogen hydrogen or N2/H2) designed to safely deliver active hydrogen species to device interfaces without the explosive risk associated with pure hydrogen gas (Engineering Practice).

As complementary metal-oxide-semiconductor (CMOS) devices scale down to the nanometer regime, the density of dangling bonds and defects at the silicon/dielectric interfaces increases exponentially [P1]. These defects act as charge traps, degrading carrier mobility, causing threshold voltage instability, and increasing gate leakage (Engineering Practice). The primary objective of FGA is to diffuse hydrogen throughout the active device stack to passivate these unsaturated dangling bonds, transforming electrically active traps into stable, inactive covalent bonds (Engineering Practice). Beyond interface passivation, FGA plays an essential role in driving low-resistance contact formation, such as transition-metal silicidation, and healing damage induced during aggressive upstream operations like dry etching [P1].

Physics & Mechanism

Hydrogen Diffusion and Passivation Kinetics

The core physical mechanism of FGA is the thermal activation and diffusion of hydrogen through metal, dielectric, and semiconductor layers to reach defect-dense interfaces (Engineering Practice). Within a forming gas atmosphere, molecular hydrogen (H2) must dissociate into active atomic hydrogen (H) or protonic species to bond with defects (Engineering Practice). While this dissociation is thermodynamically limited at low temperatures, the presence of metal layers (such as gate electrodes or contact pads) acts as a catalytic surface, accelerating the cleavage of H-H bonds [P2].

Once dissociated, hydrogen atoms diffuse through the interstitial sites of the lattice (Engineering Practice). The diffusion rate is governed by the activation energy of the host material and the thermal energy supplied during the anneal (Engineering Practice). The ultimate destination for this diffusing hydrogen is the interface between the single-crystal semiconductor (such as silicon) and its gate oxide or isolating dielectric, where silicon dangling bonds (commonly referred to as trivalent silicon or Pb centers) reside [P1]. The chemical passivation reaction is represented as:

$$\text{Si}\bullet + \text{H} \rightarrow \text{Si-H}$$

This reaction converts an unstable, electrically active defect with an unpaired electron (\text{Si}\bullet) into a stable, passivated covalent bond, drastically reducing the interface state density ($D_{\text{it}}$) (Engineering Practice).

Solid-Phase Silicidation and Interface Control

FGA is also utilized as a reducing and protective ambient during transition-metal contact reactions, such as nickel silicidation [P1]. During rapid thermal annealing in an N2/H2 environment, solid-phase reaction-diffusion occurs between deposited metal films and the underlying silicon substrate [P1].

In nanostructures like silicon nanowires, the reaction-diffusion kinetics are highly dependent on diffusion lengths, crystallography, and geometry [P1]. The forming gas environment prevents the oxidation of active metal species (such as nickel) during the high-temperature reaction [P1]. The diffusion of metal atoms into the semiconductor lattice leads to the nucleation of specific silicide phases [P1]. Crystallographic planes with lower interface energies, such as the {111} orientation, grow preferentially, producing atomically abrupt and stable contact interfaces [P1].

Passivation of Advanced Channel Materials

The physical principles of FGA extend beyond silicon to emerging two-dimensional (2D) layered materials, such as transition metal selenides (TMSes) [P2]. In these systems, chemical vapor deposition processes often generate chalcogen or anion vacancies that introduce deep-level defects [P2]. Post-treatment annealing in a nitrogen-hydrogen mixture helps stabilize structural crystallinity, heal anion vacancies, and prevent oxidation, thereby fine-tuning the electronic structure and conductivity of the layered material [P2].

Process Principles

Temperature Dependence

The selection of the temperature profile for FGA involves a careful trade-off between reaction kinetics and thermodynamic stability (Engineering Practice). Increasing the temperature exponentially increases the diffusion coefficient of hydrogen, allowing it to penetrate thick dielectric layers and reach buried interfaces rapidly (Engineering Practice). Furthermore, elevated temperatures promote transition-metal silicidation, helping drive phase transitions toward low-resistivity phases [P1].

However, if the temperature is too high, the reverse reaction (de-hydrogenation) begins to dominate (Engineering Practice). The Si-H covalent bond has a finite thermal dissociation energy; exceeding this thermal budget causes the hydrogen to dissociate and diffuse out of the stack, leaving behind unpassivated dangling bonds and degrading device reliability (Engineering Practice). Additionally, excessive thermal budgets can cause unwanted metal diffusion, vertical dopant redistribution, or phase instability in advanced contacts [P1].

Hydrogen Concentration and Chemical Potential

The concentration of hydrogen in the N2/H2 carrier gas dictates the chemical potential of the passivation species at the device surface (Engineering Practice). Higher hydrogen concentration increases the concentration gradient, which serves as the driving force for diffusion into deep, multi-layered structures (Engineering Practice). While increasing the hydrogen concentration accelerates the defect passivation rate, process designs must keep the concentration below the explosive limit of hydrogen in oxygen-containing ambients, maintaining a safe, non-flammable manufacturing environment (Engineering Practice).

Pressure and Ambience Kinetics

The ambient pressure during the anneal alters the collision frequency of gas molecules and the surface adsorption kinetics [P2]. Conducting FGA at higher ambient pressures increases the solubility of hydrogen within the dielectric and metal films [P2]. This is particularly beneficial for high-density stacks where normal atmospheric pressure is insufficient to drive hydrogen through diffusion barriers (Engineering Practice). The nitrogen component acts as a high-purity, inert carrier gas that prevents oxidation of exposed metal lines and silicon structures while maintaining a stable process chamber pressure [P1, P2].

Challenges & Failure Modes

Hydrogen-Induced Reliability Degradation

While FGA is essential for lowering initial defect density, excess hydrogen can lead to severe reliability issues during long-term device operation (Engineering Practice). Under electrical and thermal stress, excess interstitial hydrogen can react with the passivated Si-H bonds, generating atomic hydrogen that subsequently de-passivates neighbouring sites (Engineering Practice). This phenomenon is a primary driver of Negative Bias Temperature Instability (NBTI) in p-channel transistors and Hot Carrier Injection (HCI) degradation in n-channel transistors [P1].

Diffusion Barriers and Incomplete Passivation

In advanced metallization schemes, such as those employing copper dual damascene interconnects, dense diffusion barrier layers (e (Engineering Practice).g., silicon nitride or tantalum/tantalum nitride) are deposited to prevent metal migration (Engineering Practice). Unfortunately, these barrier layers also act as highly effective diffusion barriers for hydrogen (Engineering Practice). Consequently, diffusing hydrogen is blocked from reaching the active channel area, leading to incomplete interface passivation and high threshold voltage variability across the wafer (Engineering Practice).

Contact Degradation and Agglomeration

When FGA is integrated with contact-formation steps, thermal control is exceptionally critical [P1]. If the thermal budget is not precisely optimized, transition metal silicides can undergo lateral or axial over-silicidation, leading to junction leakage or short-circuiting of nano-scale channels [P1]. Furthermore, excessive annealing can cause thin metal silicide films to agglomerate, breaking the continuous low-resistance path into isolated islands and leading to a catastrophic increase in contact resistance [P1, P2].

Technology Node Evolution

Planar Nodes to FinFET Architectures

In planar technologies, such as the 28nm Planar Flow, the gate dielectric interface was flat and relatively simple to passivate using standard low-pressure FGA (Engineering Practice). However, with the transition to 3D architectures like the 14nm FinFET and 7nm FinFET, the active channel consists of three-dimensional vertical fins wrapped by the gate (Engineering Practice). This vertical design exposes multiple crystallographic planes of silicon (such as {110} and {100} surfaces), each possessing distinct interface state densities and reaction-diffusion kinetics [P1]. Passivating these complex 3D structures requires highly uniform FGA processes to ensure balanced threshold voltages across all fin surfaces (Engineering Practice).

High-K Metal Gate (HKMG) Integration

With the introduction of the high-k metal gate (HKMG) stack, standard gate oxide materials were replaced by transition metal oxides (like hafnium oxide) and metal gate electrodes (Engineering Practice). The metal gate layer acts as a physical barrier that prevents gas-phase hydrogen from easily diffusing down to the high-k/semiconductor interface (Engineering Practice). To overcome this, process engineers shifted toward high-pressure forming gas anneal (HP-FGA) systems (Engineering Practice). By increasing the ambient pressure during the anneal, hydrogen is forced through the metal gate, ensuring adequate passivation of the high-k interface without requiring destructive thermal budgets [P2].

Standard FGA (Low Pressure)     High-Pressure FGA (HP-FGA)
     [H2 / N2 Gas]                     [H2 / N2 Gas]
         ↓   ↓                             ↓↓↓   ↓↓↓
  +---------------+                 +---------------+ 
  |  Metal Gate   | [Barrier]       |  Metal Gate   | [Penetrated]
  +---------------+                 +---------------+ 
  | High-K Oxide  | [Unpassivated]  | High-K Oxide  | [Passivated *(Engineering Practice)*!]
  +---------------+                 +---------------+ 
  |  Si Substrate |                 |  Si Substrate |
  +---------------+                 +---------------+

Isotope Engineering: Deuterium Annealing

To combat the reliability limitations of standard FGA, advanced sub-7nm nodes frequently substitute hydrogen with its heavier isotope, deuterium ($D_2$) (Engineering Practice). Due to the isotope effect, the silicon-deuterium (Si-D) bond is vibrationally more stable under electrical stress than the silicon-hydrogen (Si-H) bond (Engineering Practice). This significantly reduces hot-carrier degradation and extends the operating lifetime of high-performance logic chips (Engineering Practice).

Related Processes

FGA does not occur in isolation; it is deeply connected to adjacent fabrication steps:

• Metallization & BEOL: FGA is typically positioned late in the backend of line (BEOL) sequence, often during or after copper dual damascene metallization, to minimize the impact of subsequent high-temperature steps on the passivated bonds (Engineering Practice).
• Planarization: High-quality surfaces prepared via chemical mechanical planarization (CMP) are essential to ensure uniform dielectric thickness, which in turn ensures uniform hydrogen diffusion profiles during subsequent FGA runs (Engineering Practice).
• Doping: The activation of dopants achieved through ion implantation must be fully completed before FGA, as the high temperatures required for dopant activation would immediately de-passivate the hydrogen-silicon bonds [P1].

Future Outlook

As the semiconductor industry transitions from fin field effect transistor architectures to gate-all-around (GAA) nanosheets and stacked 3D integrated circuits (3D-IC), FGA must continue to evolve (Engineering Practice). The physical confinement of GAA channels means that hydrogen must diffuse laterally through extremely narrow, high-aspect-ratio geometries (Engineering Practice). Research into plasma-assisted FGA and ultra-high-pressure FGA is underway to increase the atomic hydrogen concentration at lower temperatures, preventing the thermal degradation of delicate low-k dielectric materials and maintaining structural integrity across complex vertical interfaces (Engineering Practice).