Sidewall Spacer in MOS Transistors

A transistor sidewall spacer is dielectric material left beside a patterned gate after deposition and a directional etch. In the planar example below, it helps separate the gate edge from later source/drain operations. Its shape and electrical effect depend on the deposited film, etch and full junction profile [T1].

How the Sidewall Shape Is Made

A deposited film covers the gate top, sidewalls and surrounding surface. A directional etch removes more material from exposed horizontal regions while leaving material along the flanks. The actual shape also depends on coverage and etch selectivity, so it cannot be inferred from deposition alone [T1].

What the Spacer Changes in a Transistor

The remaining dielectric separates the gate side from adjacent processing and provides a self-aligned offset for selected later operations. In the site's 28nm Planar Flow, one earlier spacer pair appears before several LDD-related implants. A second oxide/nitride spacer sequence appears after other source/drain work and before an N+ source/drain implant. This ordering is a feature of this particular Flow; it is not a universal LDD recipe. The linked learning trail follows the second spacer's oxide deposition, nitride deposition and etch, then the later N+ implant.

The offset interacts with extension doping, electric field and series resistance. A wider or narrower spacer by itself does not establish better drive current or leakage; judge it together with the completed source/drain profile [T1].

Keep the Two Meanings of Spacer Separate

Gate sidewall spacers also help keep neighboring conductive features apart, but that does not make them interchangeable with spacer-defined patterning. In the latter, material grown beside a temporary mandrel is used as a pattern-transfer feature. Both use deposition followed by selective removal; their destinations and electrical roles differ. This article and its Flow checkpoint concern the planar transistor gate spacer. For adjacent concepts, see lightly doped drain, source and drain and mandrel-spacer patterning.

Follow the Current Planar Steps

The linked 28nm Steps are current approved course material. Start with Spacer2 Oxide Deposition and Spacer2 Nitride Deposition, then inspect Spacer2 Etch to see why a sidewall can remain. Continue to N+ Source/Drain Implantation to ask what the spacer offsets in this specific sequence. Other real operations occur between these selected Steps; the checkpoint is a teaching trail, not a complete contiguous process flow. The public Blog explains the principle; detailed Steps follow account access rules.