The self-limiting tendencies of surface reactions help ensure that etching stops once the intended silicon surface is reached, improving fin height uniformity across dense arrays [P1].
The Fin Recess Etch is introduced after well formation and thermal budget–intensive anneals to precisely define the final protrusion height of the silicon fins above the STI dielectric, which directly sets the effective channel height wrapped by the gate in a FinFET ar…
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