7nm FinFET

Device Context and Integration Rationale

The Starting Wafer step establishes the crystallographic, electrical, and defect-quality foundation upon which the entire 7 nm HKMG FinFET process is constructed, because all subsequent patterning, oxidation, and gate-stack formation steps inherit the atomic-scale properties of this substrate [T2].For bulk FinFET integration, a high-quality single-crystal silicon wafer with a well-defined surface orientation is required to ensure predictable oxid…

• [High] Crystal Defect Propagation: Pre-existing dislocations or stacking faults in the starting wafer can propagate through thermal and mechanical processing, locally distorting the lattice and degrading carrier mobility and junction leakage in FinFET channels [T2].- [High] Surface Orientation Mismatch: Incorrect or poorly controlled wafer orientation alters Si–O bonding configurations, increasing interface trap density during pad oxide and gate oxide growth, which directly degrades su…