7nm FinFET

Device Context and Integration Rationale

Transfer Oxide Deposition is introduced immediately after SiN hardmask deposition in the STI module to establish a chemically compatible and mechanically compliant interlayer between the nitride hardmask stack and subsequent stop-nitride and amorphous silicon hardmask layers [P3].This step exists because the as-deposited SiN surface, while etch-resistant, presents high intrinsic stress and different surface chemistry that can amplify defect propagat…

• [High] Interfacial Delamination Between Oxide and SiN: If the deposited oxide does not adequately relax stress or chemically bond to the underlying SiN hardmask, tensile or compressive stress mismatch can concentrate at the interface, leading to micro-delamination that propagates during subsequent plasma etch or CMP, consistent with stress-driven failure mechanisms reported for STI stacks in [P4].- [High] Hardmask Stack Etch Selectivity Drift: Variations in oxide bonding structure or d…