Physical vapor deposition (PVD) forms films by source transfer through evaporation or sputtering; geometry and transport shape coverage. In sputtering, energetic particles eject atoms from a target, and some of those atoms reach the wafer . The method can deposit metals and some compounds, but the target composition, reactive gas and transport conditions affect the final film. A deposition step whose name lists only a material does not establish that PVD was used.
Where PVD Sits in a Modern Flow
The 7nm FinFET flow overview shows a replacement-gate sequence with named TaN and TiN deposition steps followed by metal fill and planarization. It is useful for understanding where thin metal-containing films sit in the stack. The displayed step names and cross-sections do not identify sputtering, evaporation or another deposition route. In particular, the later tungsten fill is a separate integration role and should not be treated as a PVD example.
Process map
7nm FinFET
Locate the order of TaN and TiN deposition, metal fill and planarization; the overview does not identify which step uses PVD.
Physics & Mechanism
Sputtering transfers momentum from bombarding particles to a target; target atoms leave and travel through the gas toward the substrate. Their angular and energy distributions, scattering in the gas and surface interactions affect coverage and microstructure. Many PVD processes are directional, so recessed sidewalls can receive less material than an exposed horizontal surface. But step coverage is not fixed by the PVD label: pressure, source geometry, ionization and substrate bias can change it. Reactive sputtering can form a compound using a gas such as nitrogen or oxygen, so “no chemical reaction” is not a rule for every PVD film.
Process Principles
- Source and composition: a solid target supplies material, but compound or alloy composition at the wafer need not exactly match the source. Check the resulting film rather than assuming direct stoichiometry transfer.
- Transport and topography: angular flux and gas scattering determine which surfaces receive material. Deep, narrow openings make continuity harder to maintain.
- Surface energy and damage: energetic species can change film density, stress and adhesion, while excess bombardment can resputter or damage a surface. Direction and magnitude depend on the process.
- Function before method: a barrier, seed or work-function layer has a role in the device; its role does not prove how it was deposited.
Challenges & Failure Modes
A directional flux can leave thin or discontinuous coverage in recessed features. Overhang at an opening can reduce access to deeper surfaces. Film stress, adhesion and particles can also limit yield. These are reasons to measure the actual interface and coverage, not grounds to infer the technique from a cross-section alone.
From Principle to Production Flow
Use the free 7nm overview to locate the order of replacement-gate films and the later fill. The overview gives integration context; it does not document the deposition tool used at each station. For a comparison of film-growth mechanisms, see CVD. Diffusion barriers explain one possible role of a thin metal-containing film.
Technology Node Evolution
As features become more recessed, directional delivery can make continuous lining difficult. Deposition routes may be adjusted or replaced to meet coverage and interface requirements. No technology-node label alone makes PVD the required method for a gate, barrier or seed.
Related Processes
PVD describes physical source transfer; the sputtering article examines momentum transfer and recessed-feature coverage. CVD describes film formation through precursor reactions. A stack may use both alongside electrochemical fill and CMP. The source process, final film and downstream role should be recorded separately.
Future Outlook
PVD remains a candidate where its material delivery and film properties meet a structure's needs. For smaller openings and sensitive interfaces, compare measured coverage, stress, composition and damage with alternative deposition routes.
References
Silicon VLSI Technology - Full
James D. Plummer, Michael D. Deal, Peter B. Griffin
Silicon VLSI Technology · ISBN 978-0130850379