Backside illumination involves more than turning a device drawing upside down. Sensor silicon must be removed to a state suitable for later electrical and optical integration, while the progressively thinner structure still has to survive processing and handling. Bonding first supplies support for that removal.
Bonding changes the mechanical starting condition
At step 290, CIS/ISP Wafer TC Bond joins the wafers into an integrated structure. The interface must remain compatible with the existing devices and interconnects to support later backside work. A drawing of joined surfaces is not a measurement of bond quality, but it does identify the supporting side.
Process checkpoint
Understand CIS/ISP Wafer TC Bond in context
Compare the support established by bonding with the structure after backside thinning to explain their ordering.
Process context for “Why bond before thinning a backside-illuminated sensor?”: 40nm BSI CMOS Image Sensor · BOND · Step 290
Backside integration: why bonding precedes thinning and passivationTrack the sensor when the view changes
Step 295 uses a backside orientation. Follow sensor silicon, device/interconnect layers, and the bond interface by identity rather than screen position. CMP continues thinning and smoothing the sensor backside. This changes the silicon path to the photosensitive region and prepares a surface for treatment; it does not simultaneously resolve every absorption, collection, and mechanical constraint.
Why does passivation belong to this same story?
Thinning exposes a new silicon surface. Defects and near-surface potential can influence recombination and collection. The backside AlO dielectric at step 307 therefore takes responsibility for the interface. Bonding enables thinning; thinning establishes a surface; passivation addresses that surface's electrical boundary.
The short route explains dependencies rather than a complete bonding recipe. Once that order is clear, antireflection layers, filters, and lenses can be understood as additions to a backside that has already been mechanically and electrically prepared.
Follow three handoffs in the images
The sensor and opposing wafer meet at the bond interface; track material identities when comparing the later backside view.
First locate the bond interface. It combines a sensor with completed frontside structures and the other wafer. That support relationship prepares the assembly for further processing; it does not mean the optical stack is already complete.
The backside view shows the sensor profile after silicon removal; its orientation differs from the bonding view.
Next identify the sensor backside as the removal surface. When the drawing changes orientation, use the positions of devices and interconnects to recover the physical direction. A layer appearing on a different side of the screen has not traveled through the silicon.
AlO lies at the silicon backside and locates the passivation interface; this is not a local substrate-contact opening.
Finally, examine the newly exposed silicon–dielectric boundary. Mechanical support addresses whether processing can continue. Passivation addresses how the resulting surface interacts with carriers. One does not substitute for the other.
A useful counterfactual is to remove the support from this particular sequence: the sensor would then have to withstand processing as its own silicon is removed. That identifies why the support relationship matters without prescribing a specific bonding recipe or claiming a measured fracture limit.
This article explains the dependency in the illustrated integration route, not every available wafer-support approach. Other implementations may arrange carriers differently. Before transferring the lesson to another process, identify which structure actually supports the sensor during thinning.
Sources
References
A Review of the Pinned Photodiode for CCD and CMOS Image Sensors
E. Fossum, Donald B. Hondongwa · IEEE Journal of the Electron Devices Society