EOT: What It Is and How It's Calculated

Equivalent oxide thickness (EOT) expresses a gate dielectric's capacitance as the thickness of an ideal SiO₂ layer with the same capacitance per unit area. For one ideal uniform film, $EOT = t_{film}(\kappa_{SiO2}/\kappa_{film})$. An actual gate stack can contain more than one dielectric layer, so applying that single-film formula to the whole stack can understate its EOT. In the ideal series-capacitor model, each dielectric contributes a term: $EOT_{stack} = \sum_i t_i(\kappa_{SiO2}/\kappa_i)$. Electrical measurement, interfaces and non-ideal effects determine how closely a real device follows this simple model [P1].

Why the interfacial layer matters

A high-permittivity film can be physically thicker than an SiO₂ film with similar ideal capacitance. Greater physical thickness can reduce some direct-tunneling paths, but EOT alone does not guarantee low leakage or reliability: barrier properties, defects and interfaces also matter. A thin lower-permittivity interfacial layer is in series with the high-k layer and contributes to the total EOT. Consequently, changing only the high-k film may have less effect than its single-film formula suggests.

Two-layer approximation

For the two-layer idealization, $EOT_{stack} = t_{IL}(\kappa_{SiO2}/\kappa_{IL}) + t_{high-k}(\kappa_{SiO2}/\kappa_{high-k})$. This is a capacitance accounting relation, not a target film thickness or a deposition recipe. It explains why both interface quality and capacitance must be assessed when considering a high-k metal-gate stack. A lower calculated EOT does not by itself show that threshold voltage, mobility or lifetime improved.

The Gate Stack That Sets EOT

The 28nm planar flow overview leads to named gate-module steps for a thin gate oxide, nitridation, high-k deposition and gate metal. The learning route points to those specific steps under their existing access rules. Use them to identify which dielectric layers contribute to the capacitance model. The metal electrode affects gate behavior but is not another dielectric thickness term in the ideal EOT sum. Step names and diagrams do not provide measured EOT values or certify interface quality.

Conditions before using the number

State whether the value is an ideal estimate or extracted from electrical data, which dielectric layers are included, and which interface or parasitic effects were considered. Hafnium dioxide describes one high-k material; gate oxidation explains an SiO₂ baseline. Those materials do not by themselves specify a complete gate stack. For a shorter definition, compare the EOT terminology page; this page focuses on the series-stack interpretation and its limits.