CET and Dielectric EOT: What Does the Capacitance Include?

An electrical thickness inferred from a measured MOS capacitance need not equal the equivalent thickness assigned to its dielectric layers. The semiconductor's charge response can contribute to the measured capacitance. Before comparing CET and EOT, state which capacitance each author includes: terminology and extraction conventions are not universal. [T1][P1]

Define the boundary before using either acronym

Here, dielectric EOT means the SiO2-equivalent thickness of the insulating stack in an ideal series-capacitor model. CET refers to a capacitance-equivalent thickness calculated from a stated electrical capacitance, which can include semiconductor response. These are the conventions used for this explanation, not a claim that every publication uses the acronyms identically.

Hu calls an effective electrical thickness inferred from inversion-region capacitance Toxe. The cited study on a high-k/InGaAs MOS structure uses CET while explicitly considering charge-centroid and quantum effects. The shared learning task is to identify the boundary of the capacitance model, rather than equating every similar abbreviation. [T1][P1]

The dielectric is only part of the voltage response

In the ideal dielectric-only picture, a small change in charge produces a voltage change across the insulator. In a MOS structure, charge in the semiconductor must also respond. A finite semiconductor contribution adds another part of the incremental voltage change; the terminal capacitance can therefore be smaller than the dielectric capacitance. [T1]

For an illustrative model using capacitances per unit area, write 1/c_total = 1/c_ins + 1/c_sem. This is a conceptual series relation under stated assumptions. It is not a universal fit to every measured C-V curve, nor a thickness recipe.

If an equivalent thickness is defined by the reference permittivity divided by a capacitance per unit area, using c_total rather than c_ins changes the resulting thickness. Under this simple positive-series-capacitance model, the total-response equivalent is larger. That inequality must not be extended indiscriminately to measurements affected by leakage, parasitics, traps or an incompatible extraction model.

Charge does not form a perfectly thin sheet at the interface

The charge-centroid effect concerns the spatial distribution of carriers: their effective center can lie inside the semiconductor rather than exactly at the dielectric boundary. Hu explains how this changes the electrical thickness associated with a MOS capacitor. [T1]

Quantum capacitance describes another aspect of charge response: changing the carrier population requires changing its energy occupancy, with a response related to the available electronic states. The high-k/InGaAs study includes quantum and centroid contributions in its model. Its material system and assumptions matter; a result from that structure is not a numerical correction for every silicon gate. [P1]

These contributions must be accounted for consistently. One should not add an extra “quantum correction” to an extracted capacitance if the chosen model already includes that response. The useful question is which effects are inside the definition, not how many named correction terms can be collected.

A metal gate removes one possible contribution, not all of them

A polysilicon gate can develop its own depletion region, adding another series contribution. Hu separates this effect from the finite thickness of the semiconductor charge layer. Replacing a semiconductor gate electrode with an appropriate metal addresses the poly-depletion contribution; it does not force the channel charge to become an infinitely thin, infinitely responsive sheet. [T1]

Question	Relevant model boundary	Invalid shortcut
What is the dielectric-stack equivalent?	Insulating layers and their polarization	Treating the entire measured MOS capacitance as dielectric-only
What electrical equivalent was reported?	The stated terminal capacitance and extraction conditions	Comparing acronyms without their definitions
Does the gate electrode deplete?	Gate-electrode response	Assuming every series contribution vanishes with a metal gate
Did reliability improve?	A separate degradation assessment	Certifying lifetime from a smaller thickness equivalent

Test an interpretation without inventing a measurement

Imagine two modeled structures with the same dielectric stack but different semiconductor charge response. Their dielectric EOT can remain the same while their total-response equivalent differs. Conversely, a change in measured capacitance does not uniquely prove dielectric growth: a different bias regime or another model contribution must first be considered. [T1][P1]

Keep the dielectric-stack EOT article for the layer-by-layer insulator model. Use this article when the additional question is what the electrical capacitance includes. The capacitance and leakage comparison explains why a capacitance result also cannot certify carrier transport through the dielectric.

Locate the dielectric and electrode in the teaching Flow

Continue through 28nm High-k HfO2 Deposition, Step 45, then TiN Gate Metal Deposition, Step 48. In their opening explanations, identify the gate dielectric and the neighboring gate electrode. Explain which material belongs to the insulating-stack accounting and which establishes the electrode boundary.

That is the route's bounded task. The two stations do not supply a measured CET, a charge-centroid profile or the InGaAs experiment. After locating the materials, return to the capacitance definitions above and state what additional electrical information would still be needed before assigning a total-response thickness.

Sources

• Chenming Hu, Modern Semiconductor Devices for Integrated Circuits, Chapter 5
• Rahman et al., Border Trap Extraction with Capacitance-Equivalent Thickness