14nm FinFET

In the 14nm FinFET node, direct photolithography cannot resolve the sub-30nm fin pitches required for physical density scaling, necessitating multi-patterning schemes such as Self-Aligned Double Patterning (SADP) [P3][A1]. The previous steps establish a protective stack consisting of pad oxide, pad nitride, and stop oxide over the bulk silicon substrate [P2]. The amorphous silicon (a-Si) hardmask deposited in this step acts as a temporary sacrificial mandrel layer, which will be patterned via …

• [High] Localized Crystallization (Grain Formation): If the deposition temperature exceeds the crystallization threshold or if subsequent thermal steps provide excessive thermal budget, the amorphous silicon film can undergo local phase transitions to a crystalline phase [P1][T2]. This crystallization introduces grain boundaries, which exhibit different etch rates compared to the amorphous matrix, leading to severe line-edge roughness (LER) and line-width roughness (LWR) during subsequent p…