Increasing film density improves implant blocking efficiency and chemical robustness, while excessive plasma energy can increase interfacial defect density, illustrating the directional trade‑off between film quality and interface damage .
In depth
Device Context and Integration Rationale
The PHV SiN liner deposition is introduced immediately after dummy gate removal and aggressive gate/fin etch steps to re‑establish a chemically stable and mechanically robust surface on the exposed fin sidewalls
and substrate before high‑voltage well and source/drain implant operations . The preceding ash clean and etch steps intentionally expose silicon and STI oxide surfaces, but these surfaces are highly reactive and vulnerable to implantation‑induced damage, making a conformal liner necessary to act as a physical and chemical buffer during subsequent ion bombardment . This liner therefore defines a controlled interface condition prior to the pre P‑type implant ash and clean, ensuring that implantation damage and surface charging effects are moderated rather than directly transferred into the fin body . In integration logic, placing this liner before lithography and implantation ensures that the dopant introduction step operates against a stabilized boundary condition, improving junction abruptness and uniformity along the fin height .
Physical and Chemical Deposition Mechanism
The silicon nitride liner is formed through surface‑reaction‑controlled deposition, where silicon‑containing precursor species and nitrogen‑containing reactants form Si–N bonds directly on exposed surfaces, producing a dense, amorphous SiNx network . In deposition modes derived from ALD or low‑damage plasma‑assisted processes, the growth mechanism is governed by self‑limiting adsorption and surface reaction kinetics rather than gas‑phase reactions, which is essential for achieving conformal coverage on three‑dimensional FinFET topography . Plasma‑generated reactive nitrogen species lower the activation energy for nitridation, enabling film formation without exceeding the thermal budget constraints imposed by earlier gate and isolation structures . The resulting SiN film electrically passivates dangling bonds and provides a mechanically continuous barrier that redistributes implant‑induced collision cascades away from the silicon lattice, reducing defect generation in the channel region .
Material and Method Selection Logic
Silicon nitride is selected for this liner because its moderate dielectric constant, strong Si–N bond energy, and high resistance to ion penetration collectively provide effective shielding during high‑energy implant steps while maintaining compatibility with downstream cleans and etches . Compared with oxide liners used in STI or POP applications, SiN offers superior barrier properties against dopant channeling and metallic contamination, which is particularly critical in the implant module . Increasing film density improves implant blocking efficiency and chemical robustness, while excessive plasma energy can increase interfacial defect density, illustrating the directional trade‑off between film quality and interface damage . The integration objective is therefore to balance surface passivation, conformality, and minimal lattice disturbance rather than maximizing thickness or stress effects, which distinguishes this step from stress‑engineering or isolation‑focused nitride liners .
14 nm Node‑Specific Considerations
At the 14 nm FinFET node, the fin width and pitch are sufficiently small that implant shadowing and sidewall damage can directly translate into threshold voltage variability and degraded electrostatic control . A conformal SiN liner ensures that the effective implant boundary condition is uniform along the entire fin height, supporting the formation of vertically abrupt and conformal junctions described in advanced FinFET junction schemes . Unlike STI or RMG liners, which primarily address isolation, gap‑fill, or work‑function tuning, the PHV SiN liner is uniquely optimized for implant survivability and junction integrity, making it a node‑enabling step rather than a generic dielectric deposition .
Risks & Challenges
[High] Interface Defect Generation: Excessive ion or plasma energy during deposition can break surface Si–Si bonds and create dangling bonds at the Si/SiN interface, which later act as recombination or trapping centers and degrade channel mobility after implantation .
[Medium] Non‑conformal Sidewall Coverage: Incomplete surface‑reaction saturation on high‑aspect‑ratio fins leads to thinner liner regions on sidewalls, reducing implant shielding and causing fin‑height‑dependent dopant penetration .
[Medium] Stress‑Induced Fin Deformation: Intrinsic stress in the SiN network can mechanically load narrow fins, subtly altering band structure and carrier mobility, which becomes non‑negligible at scaled fin dimensions .
[Low] Chemical Incompatibility with Subsequent Cleans: Residual hydrogen or weakly bonded nitrogen species in the liner can be preferentially attacked during downstream ash and wet clean steps, locally thinning the liner and re‑exposing silicon surfaces .
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